[Libre-soc-bugs] [Bug 583] Implement simple VL for-loop in nMigen for TestIssuer

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=583

--- Comment #19 from Cesar Strauss <cestrauss at gmail.com> ---
Fixed and enabled a looping test to ease iterative development.

The looping is important to ensure that a PC update on the issue/execute FSM is
correctly picked up on the fetch/decode FSM.

https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/simulator/test_sim.py;h=1fe38e73880e734134bea00fd241ffb2e1a5b836;hb=HEAD#l417

-- 
You are receiving this mail because:
You are on the CC list for the bug.