[Libre-soc-bugs] [Bug 755] add grev instruction (OP_GREV)

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Thu Dec 23 06:58:01 GMT 2021


https://bugs.libre-soc.org/show_bug.cgi?id=755

--- Comment #13 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #12)
> also can you put the rtlil creator back in, they are really useful

they're there, i added automatic rtlil writing to the do_sim function, so rtlil
is written by every unit test. apparently that wasn't obvious from the "run
this specific unit test, then run yosys" paraphrased comments:
> # useful to see what is going on:
> # python3 src/nmutil/test/test_grev.py
> # yosys <<<"read_ilang sim_test_out/__main__.TestGrev.test_small/0.il; proc; clean -purge; show top"

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