[Libre-soc-bugs] [Bug 757] New: bitmanip instruction encodings -- adjust to match existing X/XO-forms?

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=757

            Bug ID: 757
           Summary: bitmanip instruction encodings -- adjust to match
                    existing X/XO-forms?
           Product: Libre-SOC's second ASIC
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: source code
          Assignee: lkcl at lkcl.net
          Reporter: programmerjake at gmail.com
                CC: libre-soc-bugs at lists.libre-soc.org, lkcl at lkcl.net,
                    programmerjake at gmail.com
            Blocks: 741, 755
   NLnet milestone: ---

Currently, the encoding for bitmanip instructions such as grevi have the sh
fields split across several different ranges, bits 16 to 20 and bit 23. Also
the XO field is split across 21 to 22 and 24 to 30. This has little in common
with any existing instructions.

0.5  6.10  11.15  16.20  21.22  23  24....30  31  name
NN   RA    RB     sh     01     SH  1010 110  Rc  grevi

I propose that we instead use an encoding like the XO and X forms:
# 1.6.16 XO-FORM (trimmed)
   |0     |6   |11   |16     |21 |22    |31  |
   | PO   |  RT|   RA|   RB  |OE |   XO |Rc  |

# 1.6.7 X-FORM (trimmed)
   |0     |6   |11  |16  |21   |31  |
   | PO   | RT | RA | RB |  XO |Rc  |


Proposed encodings:
   |0     |6   |11   |16     |21 |22    |31  |
   | PO   |  RT|   RA|   SH      |   XO |Rc  | grevi (kinda XO-form)
   | PO   |  RT|   RA|   RB  |       XO |Rc  | grev (X-form)

To get the new encoding, take the old encoding and remove bit 23, inserting it
before bit 21, so it becomes the new bit 21 and bit 21:22 are shifted over 1 to
22:23.


Referenced Bugs:

https://bugs.libre-soc.org/show_bug.cgi?id=741
[Bug 741] bitmanip ALU implementation
https://bugs.libre-soc.org/show_bug.cgi?id=755
[Bug 755] add grev
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