[Libre-soc-bugs] [Bug 745] OP_TERNLOG instruction

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sun Dec 12 00:45:55 GMT 2021


https://bugs.libre-soc.org/show_bug.cgi?id=745

--- Comment #43 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #40)
> ahh, and *this* works.
> 
> @@ -12,7 +12,7 @@ Pseudo-code:
>      result <- [0] * XLEN
>      do i = 0 to XLEN - 1
>        idx <- (RT)[i] || (RA)[i] || (RB)[i]
> -      result[i] <- (TLI & ROTL64(1, idx)) != 0
> +      result[i] <- TLI[7-idx]
>      RT <- result
>  
> nuts.  note the 7-idx.  IBM will have a fit about that,
> it's LSB0-to-MSB0 conversion and i'm pretty sure they'll
> want (insist on) MSB0 being in the spec.
> 
> deep breath: the spec needs to read:
> 
>       result[i] <- TLI[idx]

I'd strongly argue we need little-endian anyway for essentially the same
reasons as SV integer predicates being in little-endian, if we're ever going to
have the non-immediate form. If we know for sure that we'll only have ternlogi,
then it doesn't matter as much cuz the compiler can easily do the endian swap.

That's why I used ROTL64 there, cuz it gives natural-looking little-endian, and
the left-shift operator apparently doesn't exist.

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