[Libre-soc-bugs] [Bug 50] nmigen pinmux

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=50

--- Comment #75 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Andrey Miroshnikov from comment #74)
> (In reply to Luke Kenneth Casson Leighton from comment #73)
> > (In reply to Andrey Miroshnikov from comment #72)
> > use test_jtag_tap.py instead.
> Test_jtag_tap.py doesn't interact with the core/pad signals using the "ios"
> dict directly, which I guess it can't anyway (because everything has to be
> done via TDI/TDO).

... check c4m-jtag tap source code. add_io()

https://git.libre-soc.org/?p=c4m-jtag.git;a=blob;f=c4m/nmigen/jtag/tap.py;h=1f3d424cbd7451c0434e0c71168f5aa0935af860;hb=c2bf4810f9f91ced7fcda777b92b86ab353da288#l532

that's adding the Record (IOConn) to an internal list, self._ios.
that then, if you search for self._ios, lines 587, 590, 593, 595,
600, 601 and 602, you can see the Muxes.

now returning to jtag.py

https://git.libre-soc.org/?p=pinmux.git;a=blob;f=src/spec/jtag.py;h=efda2806c07e6f01f3e8501e9bcdd8245fc63991;hb=9f43ae5a883590d91b9a6f1211c1b29e5dd68fbc#l83

we see the *exact same data structure being added to a dictionary-version
self.ios instead of a list-version self._ios.

therefore, logically, we may deduce that those *are* the IOConn Records,
and that if they're not changing then you're doing something wrong.

> Looking at "show jtag", I saw a few signals of note:
> -irblock_ir (which is produced from a 4-bit ir in irblock) determines the
> mux connections.

yyep.

> For switching the muxes to break pad/core connection, I need to somehow
> clear the irbloc_ir signal, I guess it can be done via one of the "jtag_"
> commands (I haven't figured out which one).

well, it's going to be a shift register, obviously, because JTAG *is*
shift registers.  this looks like it's setting something, doesn't it?

 74     bs = yield from jtag_read_write_reg(dut, BS_SAMPLE, bslen, bs_actual)


> Do you know the sequence shifting in data? Or where I can find an example
> sequence? (Did not find such an example in jtag.py, jtagutils.py,
> test_jtag_tap.py, test_jtag_tap_srv.py)

 74     bs = yield from jtag_read_write_reg(dut, BS_SAMPLE, bslen, bs_actual)

> I tried:
> -Reseting the JTAG

if you do that everything will be lost (the shift registers returned
to default values)

> Sorry, I don't understand why your are checking for "vi" processes. Is this
> for when you have so many terminals open, that you just trying to find the
> right one? But then why count the number of entries with wc?

because when it gets to 1,350 as it did a few months ago i find it
hilariously funny.

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