[Libre-soc-bugs] [Bug 665] very basic nmigen-to-c compiler needed

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=665

--- Comment #12 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
mikolaj rather than create a new repo, or alter nmigen, can you
please start by taking a complete *unmodified* copy of _pyrtl.py and anything
else needed to run _pyrtl.py as a nmigen pyrtl Simulator() and drop
it into the openpower-isa repository.

with appropriate renaming of classes and imports the first task should
be to get an absolutely simple simulation running *in pyrtl* but in
the openpower-isa directory not nmigen/sim directory.

do not copy over more than that!

the next task is then to stop the actual Simulation
itself from going ahead, it is probably sufficient to
just not call "sim.add_sync_process()" or "sim.run()"
and to then begin the task of adjusting the *copy* of
_pyrtl.py so that it blats out c instead of python.

this should be extremely straightforward albeit slightly
trippy in that you will be working at 3rd hand: this is
after all compiler technology, which is always a bit hairy.

the saving grace here is that the output is utterly utterly
braindead simple. no loops, no switches, no gotos, no whiles,
nothing.

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