[Libre-soc-bugs] [Bug 50] nmigen pinmux

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=50

--- Comment #66 from andrey at technepisteme.xyz ---
(In reply to Luke Kenneth Casson Leighton from comment #65)
> fixed by instead registering the actual Signal/Record (named the "pin"
> in Platform resource terminology, *not* the port which is the Pin/Resource)
Ah ok, makes sense. Is it effectively trying to read/write a node between
signals, not the wire/signal itself?

> 
> i made it a dict-of-dicts so there is a dict by keynames
> 'gpio_0__gpio0__o' and then the pin named 'o', 'oe', or 'i'
> inside that.
Thanks. I added the pad input signals which I'm able to control as well.

> 
> oe is its *own pin* and it should be accessed as:
> ...
> because it is actually an *output*.  long story.
I'll add this one after resolving an issue with reading core input.

After writing a 1 or 0 to the pad input, I want to read the input value seen at
the core. In GTKWave I can see that the core input is being set correctly.

https://git.libre-soc.org/?p=pinmux.git;a=commitdiff;h=6d46867430b5ec24f5d9fce2ff1ae098a1a4114d


I tried the following to access core input (only showing GPIO0 i for
simplicity):
gpio0_core_in = yield top.gpio['gpio0']['i']
and
temp_in = yield top.gpio.gpio0.i

Both of these threw TypeError seen before, so I'm guessing that I'm trying to
use pins, as opposed to signals.

The yosys show top gives me the following chain:
1. gpio_0__gpio0__i__i feeds into jtag_gpio_0__gpio0__i__pad__i
2. jtag_gpio_0__gpio0__i__pad__i feeds into gpio_0__gpio0__i__pad__i (into jtag
chain)
3. (out of jtag chain) gpio_0__gpio0__i__core__i feeds into
jtag_gpio_0__gpio0__i__core__i 
4. jtag_gpio_0__gpio0__i__core__i feeds into gpio_0__gpio0__i__i$2 (looks like
extra signal made for the comb logic)
5. gpio_0__gpio0__i__i$2 is then used in the Blinker's gpio output (XOR).

Based on the yosys diagram, I thought that jtag_gpio_0__gpio0__i__core__i is
what I can read to check if the pad input is propagating.

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