[Libre-soc-bugs] [Bug 751] idea for reducing dependency matrixes in 6600-derived architecture with register renaming

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Thu Dec 2 22:23:06 GMT 2021


https://bugs.libre-soc.org/show_bug.cgi?id=751

--- Comment #6 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #5)
> (In reply to Jacob Lifshay from comment #3)
> > This idea is intended for a cpu where all micro-ops only write to one
> > register each...

I think you're misunderstanding still: the output register can have multiple
fields in *one* FU's output register:

+--------------+
| FU           |
|              |
| output reg   |
| +----+-----+ |
| | RT | CR0 | |
| +----+-----+ |
|              |
+--------------+

the register renaming unit would tell the FUs that read from that output
register, which field to read, if it isn't already obvious from the type of
input for the instruction.

e.g.:
addi. r1, r3, 45
sub r4, r5, r1

the sub is told by the register renamer that its RB input comes from the
addi.'s RT output field in the addi.'s FU's output register (which holds both
r1 and cr0).

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