[Libre-soc-bugs] [Bug 517] Define JTAG pins and set up with litex for ulx3s85f

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sun Apr 11 23:40:36 BST 2021


--- Comment #132 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Cole Poirier from comment #131)
> (In reply to Luke Kenneth Casson Leighton from comment #130)
> > (In reply to Cole Poirier from comment #129)
> > 
> > 
> > > > look at the DCD FT232 photo. does the numbering match?
> > > > 
> > > > 
> > > > this is how mistakes are made.
> > > 
> > > It’s all there. If you do not like how it has been done please help and
> > > modify it to suit your needs.
> > 
> > i am focussing mentally on bug #620.  i reveiewed what you did, and
> > concluded:
> > 
> > 1) you missed the point that all FT232 PCBs are different
> How about we focus on supporting the ft232 I have here to actually work with
> instead of every one of the variants.
> > 2) you missed the point that clarity is critical
> > 3) if you are the one that makes the changes it trains you through "lrarning
> > by doing"
> So you’re saying to me that my learning is more important than us meeting
> the tapeout deadline? Because by making me ‘learn’ you have wasted days of
> time that could have been spent testing the ls180 over jtag on the FPGA.
> > 
> > if i do the task, you do not learn.  and, more thsn that, it stops me from
> > completing other critical tasks.
> Critical waste of time see above.
> > > Given that we have mere days until the
> > > deadline why don’t you contribute to this instead of unhelpfully pointing
> > > out things you would do differently and saying they are wrong but doing
> > > nothing to rectify this and actually helping.
> > 
> > if i stop what i am doing and complete the task that you are responsible for
> > how does that help you or the project?
> A week to make me ‘learn’, is ridiculously inappropriate given the
> circumstances. You could do this in half an hour

i could indeed spend that time, in addition to the critical tasks that i am
currently doing of keeping both Jean-Paul and Staf occupied.

if i took away the responsibility for the task, how would that make you feel?

i am already doing massive amounts here.  do you wish to add to that list?

> You checked but are in fact incorrect, the colours have changed. I triple
> checked the wiki. They have changed.

why did you change them?

why did you not indicate an intent to change them?

because you did not inform me of an intent to change the colours, you
are directly responsible for increasing the amount of work needed.

please put them back to how they were.

please restore the VERSA_ECP5 images on the page.

changing the colours massively increases the tasks that have to be done.

> > please put the diagrams back exactly as they were.
> That will result in incorrect information on the wiki page.

then that is your responsibility to correct it.

> It would be more straightforward if you would just do it instead of wasting
> literally 4 days of the week we had to make the tapeout deadline. This is a
> wildly inappropriate trade off in terms of what this has cost the project.

i simply do not have the time.  i am ensuring that both Jean-Paul and Staf are
supported and are never delayed by being without critical information.

please stop fighting and dodging responsibility for the task: dodging that
responsibility is what is taking up the time.

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