[Libre-soc-bugs] [Bug 517] Define JTAG pins and set up with litex for ulx3s85f

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Mon Apr 5 04:27:39 BST 2021


--- Comment #78 from Cole Poirier <colepoirier at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #75)
> (In reply to Cole Poirier from comment #74)
> > It seems like the stlink-v2 only works with stm8 and stm32 microcontrollers. 
> that is the smaller device.

True for the larger one we wrote the wiki docs for as well.

> > Apparently there is a way to setup jtag over gpio pins but I do not know
> > what JTAG adapter supports this. 
> http://openocd.org/doc-release/README
> "transport select jtag"

I wish it was that simple, it it not. By jtag adapter I mean the usb dongle
like the stlink-v2, not the transport.

> > Do you know of a jtag usb adapter that supports softcore targets?
> i don't

Isn't that a problem as we are using a softcore and using gpio pins to do jtag
instead of the stm module on the fpga?

> > Can you comment as to what your progress on JTAG is?
> on the irc logs.  if you were on the irc channel you would have seen the
> discussion of the past week.

irc should not be used as a substitute for the bug tracker. irc is only for
short conversations, not critical development discussions. That is the explicit
purpose of the bug tracker.

> > Is your jtag boundary scan work related to this? 
> of course.  we are getting the simulator into shape so that the hardware
> will respond in the same way.

Good to know.

> > I've banged my head against this for weeks 
> why are you only just now telling us this?  wr are months behind and you are
> only just noe asking for help? i don't understand
> > and I think I've finally figured
> > out that there's a lot more involved here than setting up the pins (as we
> > did on the wiki) plugging it all in and running the *buspirate (debug
> > adapter) specific* demo from staf's retrouc gitlab repository. Any insight
> > you can provide here would be most helpful.
> well the most immediate one is that by lraving it several weeks before
> asking for help it means that you've spent several weeks being ineffective. 
> sorry if that insight shocks you, it is what it is.
> you do not have to do everything alone, without help, guidance or other
> people to provide insights, in order to "prove something".

Wasn't trying to prove anything, I was just stuck.

> the larger stlinkv2 says "JTAG" on the box.  therefore there is a way.  we
> need to find it.

It can talk to the jtag modules of stm family chips, it apparently does not
support talking to *arbitrary* chip targets. We need a jtag adapter that
supports softcores, i.e. custom defined TAPs for targets running on fpgas.

> somewhere online there *will* exist reports on how it is done.

I've looked pretty hard with poor results.

> if there was a known working JTAG device around the stlonkv2 could be tested
> against it.

I don't understand what you mean here. Can you please clarify?

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