[Libre-soc-bugs] [Bug 238] POWER Compressed Formal Standard writeup
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Mon Nov 30 20:45:04 GMT 2020
https://bugs.libre-soc.org/show_bug.cgi?id=238
--- Comment #136 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Alexandre Oliva from comment #134)
> what does N stand for, in the absence of an M in the same insn?
i am frazxled. writing for much too long.
brief response: read the newly-added Apprndix "Decode phase 2"
N does not exist in 10bit mode because it shares the same space as the EXTNNN.
this is why there are only 2 lines in the table on entry to the FSM (10bit
mode)
| 0 | 1234 | 567 8 | 9abcde | f | explanation
| - | ---- | ------ | ------ | - | -----------
| EXT000/1 | Cmaj.m | fields | 0 | 10bit then v3.0B
| EXT000/1 | Cmaj.m | fields | 1 | 10bit then 16bit
however for 16 bit mode N *can* have meaning, giving 4 encoding possibilities
| 0 | flds | Cmaj.m | fields | 0 | 16bit then v3.0B
| 0 | flds | Cmaj.m | fields | 1 | 16bit then 16bit
| 1 | flds | Cmaj.m | fields | 0 | 16b, 1x v3.0B, 16b
| 1 | flds | Cmaj.m | fields | 1 | 16b/imm then 16bit
in thetables, when you see a column with N in bit 0, and M in bit 15, it means,
"this is part 1 of 2nd Stage Decoder".
you will need to look at the pseudocode i wrote which tests combinations of N
and M.
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