[Libre-soc-bugs] [Bug 238] POWER Compressed Formal Standard writeup

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=238

--- Comment #89 from Alexandre Oliva <oliva at gnu.org> ---
I had not noticed before writing comment 16 in bug 532, but the 16-bit
immediate compressed encoding is very very similar, in function and
possibilities, to the extend-next-insn opcode I'd suggested before.

It could very well be used to significantly extend the range of registers
accessible in compressed mode, whether or not we go for 2-reg encoding in
16-bit insns, which is just what I'd hoped to accomplish with an extend-next
opcode.

This bit can even be used to make room for some extended opcodes if there are
any compressed primary opcodes that have no use for additional operands, e.g.
nop or unary operations, and even to reserve room for future extensions.

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