[Libre-soc-bugs] [Bug 238] POWER Compressed Formal Standard writeup

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=238

--- Comment #33 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #21)
> (In reply to Luke Kenneth Casson Leighton from comment #18)
> > ok do you want to have a go at reencoding the FP section? i have not studied
> > it nearly as much as the INT v3.0B so you would likely do a better job than
> > me anyway.
> 
> Sure, though I'll probably put that off till tomorrow.


btw there's a whole boatload of 16bit Cmaj.m=0b001.1 encodings free where bits
4, a and b are unused and cde still available for a single reg.

that could easily be allocated to int conversion... *if* the unusual step is
taken of setting FRT==RA (or RT==FRA).  otherwise use only 4 bits for regs

| 0123 | 4 | | 567.8 | 9 ab | c de | f |
| 0010 | X | | 001.1 | 0 RA | Y RT | M |
| 0011 | X | | 001.1 | 0 RA | Y RT | M |

2x by using bit3. 2x by using bit 4 (X)
2x by using bit c (Y)

that gives 8 opcodes to do UINT/INT/FP
conversion.

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