[Libre-soc-bugs] [Bug 238] POWER Compressed Formal Standard writeup

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=238

--- Comment #16 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #14)
> whilst a case for using the spare bits 2-4 as FP mode bits (single/double,
> rounding) is fairly clear, for INT it is less so

I'd argue for a bit for f32/f64 and a bit for fp->int trunc vs. round, but
otherwise rounding mode should always be dynamic and not encoded -- use 32-bit
if you need something else, since that is what's used in >99% of code.

The left over bits can be used for encoding other more important instructions.

> a trick:
> 
> | N |   | RT!=0 | | 011 | RB    | RA!=0 | 0 | M | sub.
> | N | 0 | 000   | | 011 | RB    | RA!=0 | 0 | M | cmpw
> | N | 1 | 000   | | 011 | RB    | RA!=0 | 0 | M | cmpl
> 
> by testing RT nonzero as the destination this leaves the actual subtraction
> (which is exactly what is used for cmp) to be tested for cmp but not stored,
> exactly as with cmp, when RT=0b000
> 
> additionally one of the downsides of only 2 regs for operations is that it
> is necessary to use a lot of mv operations to substitute for the lack.

compilers can get the number of necessary mv instructions waay down, they have
lots of experience from x86.

> with mv being 16bit and the op itself being 16bit there is no point, you
> might as well use the 32bit version which can do dest,src1,src2
> 
> which means that having "dest, src1, src2" gives an advantage as it saves 16
> bits.

except that using those bits instead to encode more immediate bits for ld,
addi, st most likely gives more advantage.

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