[Libre-soc-bugs] [Bug 523] demo program needed showing register dependencies

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=523

--- Comment #24 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Cesar Strauss from comment #23)
> I suggest also comparing hazard avoidance performance in a Tomasulo-based
> architecture.

ah good idea.

> By the Tomasulo transformation, I guess, it should be equivalent to the
> Augmented 6600 Scoreboard
> (https://libre-soc.org/3d_gpu/architecture/tomasulo_transformation/)

yes except i realised that this page needs updating to include WaW renaming. 
making it way more complex. sigh.


> I found interesting examples of multi-issue Tomasulo architectures at
> https://www.brown.edu/Departments/Engineering/Courses/En164/Tomasulo_10.pdf
> (I just added it to the Resource page).

thank you, it is very useful.


> It has some execution traces showing hazard avoidance. It also shows how
> register renaming occurs implicitly in the reservation stations (in the
> second example, it happens in the reorder buffer instead).


"The Reorder Buffer: The ROB is a small multi-ported SRAM that holds the
results of completed computation from the execution units until it is safe to
commit them to the architectural register file."

this isn't quite accurate: it's a multi-ported CAM which is disastrously
expensive: multiple banks (one per port) of XOR gates per row, all of which can
fire in every cycle.

also the multi-issue buses mentioned? contention on the CDBs? lootta fun, very
costly.  mind you the same cost exists in scoreboards, it's just that the OpFwd
Bus is separated from the reg read/write Buses, where the CDB(s) they are
rolled into one ("Common")

it is still a good idea.

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