[Libre-soc-bugs] [Bug 528] parameter needed in coriolis2 to specify individually which clocks are to have a Clock Tree
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Tue Nov 10 16:08:34 GMT 2020
https://bugs.libre-soc.org/show_bug.cgi?id=528
--- Comment #1 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
Jean-Paul:
index f1fc2f61..9877199d 100644
--- a/cumulus/src/plugins/alpha/chip/corona.py
+++ b/cumulus/src/plugins/alpha/chip/corona.py
+ @property
+ def coronaCks ( self ):
+ if self.corona.conf.useClockTree: return self.corona.conf.coronaCks
+ return []
+
this would be parameteriseable in coriolis2/settings.py (or chipConf
dictionary) to allow explicit naming of clocks that were to be an H-Tree.
in the ls180 case these would be:
* JTAG_TCK
* PLL_OUT_CLK
they would *NOT* be:
* JTAG_TCK
* PLL_OUT_CLK
* SYS_CLK
but, note: the IORing clocks would be:
* JTAG_TCK
* SYS_CLK
the H-Tree clocks *are not the same as* the IOring clocks.
this i believe is what we need. is this easily achievable by simply
modifying corona.Side class coronaCks function to return a user-defined
list?
if so then i could try that.
--
You are receiving this mail because:
You are on the CC list for the bug.
More information about the libre-soc-bugs
mailing list