[libre-riscv-dev] Scoreboard and LDST questions

[Yehowshua]

Hello Luke,
	Spent the past few hours pouring over the LDST architecture as well as the men-architecture.

Some comments/questions:
https://libre-soc.org/3d_gpu/architecture/6600scoreboard/
> The SR Latches create a forward-progressing Finite State Machine, with three possible paths:

From your description, only two of issue, go_rd, and go_wr can be active at any given time. That means that a maximum of 2 instructions can execute every 3 cycles?