[libre-riscv-dev] Introduction

[Yehowshua]

>  I have limited experience with Assembly and Verilog as well as
> extensive experience with c/c++ but I am excited to learn Nmigen and hope
> to contribute to the Power Core

Hello.

I’ll let Luke follow up a bit, but also do subscribe to the LibreSOC misc mailing list below[1].
Reason being is that I and others can help newcomers with more specific FPGA, RTL,
and nMigen concepts allowing us to keep the main dev mailing list lower traffic.

And as always, Welcome!

Yehowshua

[1]: http://lists.libre-soc.org/mailman/listinfo/libre-soc-misc