[libre-riscv-dev] [Bug 372] New: create cycle-accurate JIT-compiler-based processor simulator

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=372

            Bug ID: 372
           Summary: create cycle-accurate JIT-compiler-based processor
                    simulator
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: All
                OS: All
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: lkcl at lkcl.net
          Reporter: programmerjake at gmail.com
                CC: libre-riscv-dev at lists.libre-riscv.org
   NLnet milestone: ---

This could allow simulating our processor model much faster than most other
methods.

-- 
You are receiving this mail because:
You are on the CC list for the bug.