[libre-riscv-dev] "simple" core

[Yehowshua]

> core.py really is *very* simple.  its execution model is as follows:
> 
> * receive instruction
> * decode instruction
> * identify through bitmasking which pipeline can handle it
> * enable *only* the MultiCompUnit managing that pipeline
> * wait for it to indicate that it is not busy (this includes regfile writing)
> * move on to the next instruction.


This is great to hear.
Keep up the great work.

Yehowshua