[libre-riscv-dev] [Bug 325] create POWER9 TRAP pipeline
    bugzilla-daemon at libre-soc.org 
    bugzilla-daemon at libre-soc.org
       
    Thu Jun  4 01:34:43 BST 2020
    
    
  
https://bugs.libre-soc.org/show_bug.cgi?id=325
--- Comment #34 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
> go MSB -> LSB order, python is LSB->MSB order
sorry, that should be "python is LSB->MSB+1" order.
-- 
You are receiving this mail because:
You are on the CC list for the bug.
    
    
More information about the libre-riscv-dev
mailing list