[libre-riscv-dev] [Bug 313] Create Branch Pipeline for POWER9
    bugzilla-daemon at libre-soc.org 
    bugzilla-daemon at libre-soc.org
       
    Tue Jun  2 23:41:28 BST 2020
    
    
  
https://bugs.libre-soc.org/show_bug.cgi?id=313
--- Comment #51 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
found it.  when no registers were to be written, MultiCompUnit couldn't cope.
this actually happens with some of the branch tests.  no change to LR,
no change to CTR, no change to NIA (because the branch was not taken):
wark-wark.
i added yet another hacked-in condition to MCU to get it to test if the
ALU was finished.
-- 
You are receiving this mail because:
You are on the CC list for the bug.
    
    
More information about the libre-riscv-dev
mailing list