[libre-riscv-dev] [Bug 217] create a "ring" system which allows pad locations to be specified conveniently

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Tue Apr 7 10:46:15 BST 2020


http://bugs.libre-riscv.org/show_bug.cgi?id=217

--- Comment #56 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jean-Paul.Chaput from comment #55)
> (In reply to Luke Kenneth Casson Leighton from comment #54)
> > (In reply to Luke Kenneth Casson Leighton from comment #53)
> > > https://gitlab.lip6.fr/vlsi-eda/coriolis/issues/8
> > 
> > jean-paul i think we need your help on this one.  are we pushing
> > the auto-router too hard, not giving it enough space?  i do see
> > some tracks going in weird directions (doubling back)
> > 
> > https://gitlab.lip6.fr/vlsi-eda/coriolis/issues/7
> 
>   Hello Luke & Jock,
> 
>   I'm going to look into it this afternoon or tomorrow.

appreciated.

> I've been
>   busy with integrating the analog resistor devices then reviewing
>   a little the Python code. I'm also working on improving the
>   Python/C++ interface, going from C preprocessor macros to
>   C++ templates (have to [re]learn things here), and preparing
>   the move toward Python 3.

ok.  well, given that the code is actually working, the less disruption
that we have (say, for example... by *not* moving to python 3 so that
we don't have to spend another 3-7 days recompiling and working out
issues and redesigning the scripts and installation instructions) the better.


>   For the MoU, only the Sorbonne University can sign it on my
>   behalf, so I did forward it to my contact lawyer. 

if there is a way to emphasise to him that it is NOT a contract,
and that both LIP6 and other individuals with families are reliant
on him getting an answer - fast - for receiving money - that would
be... good.

-- 
You are receiving this mail because:
You are on the CC list for the bug.


More information about the libre-riscv-dev mailing list