[libre-riscv-dev] [Bug 272] functions needed in POWER simulator which match 3.0B spec

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Sun Apr 5 19:37:52 BST 2020


http://bugs.libre-riscv.org/show_bug.cgi?id=272

--- Comment #19 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
hiya michael, saw the commit (reinstated addi) - couple of things:

* generally, a blank __init__.py is kiiinda the normal convention?
  (there's a few exceptions)

* i believe you may have created a circular import dependency loop

* multiple ISACaller base classes have been added.  this is a pain
  to workaround.

imports in python work hierarchically.  so, import x.y.z will
look for x, then x.y and finally x.y.z

because class ISA(fixedarith, fixedload) is in soc.decoder.isa
and because fixedarith is derived from ISACaller
and because ISACaller is in soc.decoder.isa.caller i think
that goes circular.

but the multiple ISACaller bases is slightly more problematic.

how about instead either:

* creating a class ISA which has fixedarith and fixedload (etc)
  as *member* variables, which, in the constructor, merge the
  instr dictionaries into one?

* removing ISACaller as a base then making it a base of ISA:
  class ISA(ISACaller, fixedarith, fixedload)

* changing pywriter.py to output dicts named fixedarith_instr (etc.)
  which can be merged / accessed separately

oh - i think you might have fixed it, just saw the latest push :)

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