[libre-riscv-dev] Who Buys Talos Workstations?

[Cole Poirier]

> On Apr 4, 2020, at 10:55 PM, Lauri Kasanen <cand at gmx.com> wrote:
> Well, first of all, people don't run i9s or threadrippers on servers.
> Those are customer-class, customer-availability, no ECC, less RAM
> accessible, etc. They run Xeons and Epycs, which are comparable to POWER
> in price. (hobbyists not counted here, for home servers money tends to
> come first)
> 
> Their customers tend to value openness and security (their own keys, not
> the vendor's, for a truly secure boot; no ME backdoors). They may also
> be using accelerators made for POWER's custom buses, faster than PCIe.
> 
> - Lauri

OpenCapi and the rest of the Open Power Foundation projects are incredibly cool!

Some brief info with links below. As far as I am aware we don’t have plans to use this interface in Libre-SOC V1, but please correct me if this is incorrect. If it’s the the case that we are not using the interface, would you still like me to add this to the resources section of the wiki?

From the OpenCAPI-Accelerator website (https://opencapi.github.io/oc-accel-doc/):

“What is OpenCAPI?
OpenCAPI (Open Coherent Accelerator Processor Interface) is the third-generation coherent interface and is an open standard for coherent high-performance bus interface. Driven by emerging, accelerated heterogeneous computing and advanced memory and storage solutions, it provides the open interface that allows any microprocessor to attach to:
Coherent user-level accelerators and I/O devices.

Advanced memories accessible via read/write or user-level DMA semantics
Its specifications and ecosystem are managed by the OpenCAPI Consortium. The reference designs are open source and available on Github at the https://github.com/OpenCAPI/OpenCAPI3.0_Client_RefDesign”

So like Lauri said it allows users to have openness and security, for better control over their own hardware. It also allows devices to interface with various external I/O, at some pretty mind blowing speeds too, which I think is shown on slide 13 of this 2018 presentation (https://openpowerfoundation.org/wp-content/uploads/2018/04/Myron-Slota.pdf).

Gen1 and Gen2 were layered over PCIE but now in Gen3-Power9 the protocol runs on new OpenCAPI hardware. Another important advantage appears to be that the upgradability and forwards and backwards compatibility are much higher than with previous solutions.

From the Open Power Foundation Website (http://openpowerfoundation.org/wp-content/uploads/resources/oppa-1/content/dbdoclet.50429986_67380.html):

“Chapter 1. Overview

This document defines the OpenCAPI Power Platform Architecture (OPPA) for the IBM™ POWER9™ systems. The information contained in this document allows various OPPA-compliant accelerator implementations to meet the needs of a wide variety of systems and applications. Compatibility with the OPPA allows applications and system software to migrate from one implementation to another with minor changes.”

Cole