[libre-riscv-dev] [Bug 269] auto-conversion / parser of POWER ISA Spec v3.0B

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=269

--- Comment #17 from Michael Nolan <mtnolan2640 at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #15) 
> star.  technically once that base class is in place  it should be possible
> to go straight to dropping into internal_op.py

I don't see an internal_op.py anywhere, is this instead for internalop_sim.py?

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