[libre-riscv-dev] test_decoder_gas.py still fails after update for unknown reason

[Luke Kenneth Casson Leighton]

On Wednesday, April 1, 2020, Tobias Platen <libre-soc at platen-software.de>
wrote:

> I installed a working version of the GNU toolchain (via buildroot),
> but the test_decoder_gas.py still fails. Both soc and nmigen have been
> updated to the latest version.


raise a bugreport tobias. ref this msg in archive.


>     raise TypeError("Object {!r} is not an nMigen signal".format(signal))
> TypeError: Object [(sig raw_opcode_in), (sig bigendian), (sig opcode_in),
> (sig function_unit), (sig in1_sel), (sig in2_sel), (sig in3_sel), (sig
> out_sel), (sig ldst_len), (sig rc_sel), (sig internal_op), (sig form), (sig
> cr_in), (sig cr_out), (sig inv_a), (sig inv_out), (sig cry_out), (sig br),
> (sig sgn_ext), (sig upd), (sig rsrv), (sig is_32b), (sig sgn), (sig lk),
> (sig sgl_pipe), (sig valid), (sig insn_type), (sig nia), (sig lk), (sig
> invert_a), (sig invert_out), (sig input_carry), (sig output_carry), (sig
> input_cr), (sig output_cr), (sig is_32bit), (sig is_signed), (sig insn),
> (sig data_len), (sig byte_reverse), (sig sign_extend), (sig update), (sig
> oe), (sig oe_ok), (sig rc), (sig rc_ok), (sig spro), (sig spro_ok), (sig
> spr1), (sig spr1_ok), (sig spr2), (sig spr2_ok), (sig rego), (sig rego_ok),
> (sig reg1), (sig reg1_ok), (sig reg2), (sig reg2_ok), (sig reg3), (sig
> reg3_ok), (sig imm), (sig imm_ok)] is not an nMigen signal


 that's a list.  ports is returning an object containing a list rather than
a flattened iterator.

l.



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