[libre-riscv-dev] [Bug 272] functions needed in POWER simulator which match 3.0B spec

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=272

--- Comment #11 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Michael Nolan from comment #10)

> Doing it through signal would mean messing with yield and such wouldn't it?
> Unless implementing the class turns out to be very difficult, I'd kinda like
> to avoid that

sigh well as the PowerDecoder class is based around Signal we are kinda stuck
with yield and it is a pain.

i will attempt a pre and post process tomorrow which basically duplicates what
you did to get src1 2 etc out of the opcode.

once i have the regnums as integers i believe the class Int as defined, which
passes Int(value,len) around between ooerations rather than just value would do
the trick

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