[libre-riscv-dev] IEEE754 FPU

[Luke Kenneth Casson Leighton]

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crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68

On Sun, Feb 24, 2019 at 4:33 PM Aleksandar Kostovic
<alexandar.kostovic at gmail.com> wrote:
>
> >
> > problem is, i don't know how to stop this from happening
>
> Looking at it now and literaly dont know. I will give it some thought and
> try to spot a problem.

 run test_dual.py and then gtkwave on the vcd file, it will show the
internal behaviour.

 one idea might be to require the a and b inputs to both be valid
before the state machine is allowed to proceed, i.e. to combine get_a
and get_b.

l.